veri-indent

License: Free ‎File size: N/A
‎Users Rating: 4.2/5 - ‎5 ‎votes

ABOUT veri-indent

Veri-indent is a verilog source code Parser,Analyzer and Beautifier. (similar to c 'indent' , but more than that). Verilog source can be formatted and Symbol table, list of registers,wires,pli calls in source code can be extracted.