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Equivalence Checker For Netlists

License: Free ‎File size: N/A
‎Users Rating: 5.0/5 - ‎1 ‎votes
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Equivalence checking for two netlists of ORCAD schematic designs. Check out whether two netlists may generate the idendical PCB in later design stage, even if they are derived from different design procedures with different part-ref and siganl-name.

VERSION HISTORY

  • Version beta_uncompleted posted on 2007-10-25
    Several fixes and updates
  • Version N/A posted on 2007-10-25

Program Details

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