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verilog compiler

License: Free ‎File size: N/A
‎Users Rating: 4.0/5 - ‎1 ‎votes
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A verilog language compiler written using Java and JavaCC. It produces a netlist, an ascii text file, of all the cell connections. It can compile very large circuits comprised of many modules.

VERSION HISTORY

  • Version Binaries posted on 2009-08-29
    Several fixes and updates
  • Version N/A posted on 2009-08-29

Program Details

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