Program for creating Verilog synthesizable XOR trees for high performance designs. Supports creation of Hamming Code (ECC) generators, checkers, and GF2 Multipliers.
VERSION HISTORY
- Version 0.2 posted on 2011-01-31
Several fixes and updates - Version 0.2 posted on 2011-01-31
Program Details
- Category: Development > Other
- Publisher: xtgenerate.sf.net
- License: Free
- Price: N/A
- Version: 0.2
- Platform: windows