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Covered 0.7.10

License: Free ‎File size: N/A
‎Users Rating: 4.3/5 - ‎8 ‎votes

ABOUT Covered

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.

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