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DSP-GaTech-ECE6276A

License: Free ‎File size: N/A
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This project develops a DSP processor that is optimized for FIR/IIR/DCT operations. The coding is done in VHDL, and is intended to be synthesized by Altera Quartus II.

VERSION HISTORY

  • Version initial posted on 2004-11-24
    Several fixes and updates
  • Version N/A posted on 2004-11-24

Program Details

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