PROGRAMS BY dsp-gatech.sf.net
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DSP-GaTech-ECE6276A Free
This project develops a DSP processor that is optimized for FIR/IIR/DCT operations. The coding is done in VHDL, and is intended to be synthesized by Altera Quartus II.
This project develops a DSP processor that is optimized for FIR/IIR/DCT operations. The coding is done in VHDL, and is intended to be synthesized by Altera Quartus II.